Hi! I'm working on the port of Mbed OS to RP235x MCUs. I'm trying to port over our reset reason detection, and it seems like it should work based on the datasheet, but I'm seeing a lot of test failures.
Basically, it seems like, at least for the reset sources I can actually trigger, the HAD_POR flag (and only that one) in POWMAN->CHIP_RESET is always set. I have tried:
So my question is, is there something extra I need to do in order to get this register to read out properly? Do I need to clear it after the chip starts so it can be set again by the next reset or something? And what is the expected behavior in the cases above? Would appreciate some guidance here.
Here's my code if it helps:
Basically, it seems like, at least for the reset sources I can actually trigger, the HAD_POR flag (and only that one) in POWMAN->CHIP_RESET is always set. I have tried:
- Triggering a debugger reset through OpenOCD (which says it uses SYSRESETREQ)
- Calling NVIC_SystemReset()
- Triggering a watchdog reset via allowing the watchdog to time out
So my question is, is there something extra I need to do in order to get this register to read out properly? Do I need to clear it after the chip starts so it can be set again by the next reset or something? And what is the expected behavior in the cases above? Would appreciate some guidance here.
Here's my code if it helps:
Code:
reset_reason_t hal_reset_reason_get(void){ // Use this function instead of checking the watchdog bits because it uses additional, // scratch-register-based heuristics to determine if the watchdog reboot was "real", // or if it was caused by a non-actual-WD-timeout reason like loading firmware through the bootrom if(watchdog_enable_caused_reboot()) { return RESET_REASON_WATCHDOG; } const uint32_t powman_chip_reset = powman_hw->chip_reset; if(powman_chip_reset & (POWMAN_CHIP_RESET_HAD_GLITCH_DETECT_BITS | POWMAN_CHIP_RESET_HAD_BOR_BITS)) { return RESET_REASON_BROWN_OUT; } else if(powman_chip_reset & POWMAN_CHIP_RESET_HAD_SWCORE_PD_BITS) { // I THINK this is set only when waking from dormant (core completely off) mode, // which Mbed does not currently support return RESET_REASON_WAKE_LOW_POWER; } else if(powman_chip_reset & POWMAN_CHIP_RESET_HAD_RESCUE_BITS) { // Note: This will only be reached with the debugger resets the core from a lockup, // but may as well add it. return RESET_REASON_LOCKUP; } else if(powman_chip_reset & POWMAN_CHIP_RESET_HAD_DP_RESET_REQ_BITS) { return RESET_REASON_DEBUGGER; } else if(powman_chip_reset & POWMAN_CHIP_RESET_HAD_RUN_LOW_BITS) { return RESET_REASON_PIN_RESET; } else if(powman_chip_reset & POWMAN_CHIP_RESET_HAD_POR_BITS) { return RESET_REASON_POWER_ON; } return RESET_REASON_UNKNOWN;}Statistics: Posted by MultipleMonomials — Sun May 31, 2026 10:56 pm





